Intel's 'Ivy Bridge' chips that use the 22nanometer (nm) process will be the first to benefit from the 3D Tri-Gate design transistor, which was first developed by Intel in 2002.
According to Intel, the chips will help in maintaining the pace of Moore's Law as devices become smaller and smaller. Moore's Law is the prediction made more than 40 years ago by Intel co-founder Gordon Moore that states the number of transistors on a chip would double about every two years.
The 3D transistors also ensure chips can operate at lower voltage with lower leakage, improving performance by 37 percent compared to versus Intel's 32nm planar transistors, as well energy efficiency. The 3D transistors consume less than half the power of 2D transistors on 32nm chips.
The transistor features a 3D silicon fin that rises up vertically from the silicon substrate. Meanwhile, current is controlled by implementing a gate on each of the three sides of the fin – two on each side and one across the top - rather than just one on top, as is the case with the existing 2D planar transistor. As a result as much transistor current as is possible flows when the transistor is in the 'on' state, maximising performance. However, when the transistor is switched to the 'off' position, close to zero current is flowing. The transistor can switch very quickly between the two states, which also maximises performance.
"Intel's scientists and engineers have once again reinvented the transistor, this time utilising the third dimension," said Intel President and CEO Paul Otellini. "Amazing, world-shaping devices will be created from this capability as we advance Moore's Law into new realms."
Mark Bohr, Intel Senior Fellow revealed: "The performance gains and power savings of Intel's unique 3D Tri-Gate transistors are like nothing we've seen before."
"We believe this breakthrough will extend Intel's lead even further over the rest of the semiconductor industry."